In a 3GPP WCDMA (Wide Band Code-Division Multiple Access) digital communication system a Synchronisation Channel (SCH) is transmitted by base station equipment (Node B) of a cell for the first 256 chips of each 2560 chip time slot (3GPP TS 25.211, “Technical Specification Group Radio Access Network: Physical Channels and Mapping of Transport Channels onto Physical Channels (FDD)”, June 2005, Section 5.3.3.5). The data transmitted on the SCH is essential for a User Equipment (UE) receiver in order to synchronise to the cell. As it is such an important channel, the SCH may be transmitted at a high power relative to other downlink channels transmitted in the cell. Unlike other WCDMA downlink channels, the SCH is not encoded using an Orthogonal Variable Spreading Factor (OVSF) code and therefore, even in the absence of multipath fading conditions, it is not orthogonal to other channels in the cell. When the user equipment is operating in high cell geometry (i.e. it is close to the centre of the cell), the SCH may be a significant source of interference. This may be problematic for two reasons. Firstly, the SCH signal may affect the received signals of other lower power downlink channels, causing errors of phase and amplitude in the corresponding data samples. Secondly, interference estimates made on specific chip positions within the slot may not correctly take the SCH interference into account. For downlink Dedicated Physical Channels (DPCHs), the interference experienced during a slot is typically estimated based on the DPCH dedicated pilot symbols transmitted at the end of the slot, or based on the Common Pilot Channel (CPICH) transmitted over the entire slot. When the interference is estimated from the dedicated pilots, depending on the relative delay between the DPCH and SCH, the SCH may affect the DPCH data fields but not the pilot field. When the interference is estimated from the CPICH, the SCH only affects a single CPICH symbol of the CPICH slot. Therefore, neither method can correctly take into account the SCH interference on the affected data samples. As a result, the DPCH symbols affected by the SCH will have a much higher actual level of interference than that estimated.
FIG. 1 is a schematic block diagram of the receiver for a digital communications system. An antenna 2 receives an incoming signal 4 over a wireless communication channel. The incoming signal 4 is supplied to RF and IF stages 6 which provide a baseband signal to a receiver front end 8 where analogue to digital conversion takes place.
The receiver front end 8 supplies digitised data to a signal detector 10 which generates received signal samples yk for further processing in the receiver. In a wide band code-division multiple access user equipment, the signal detector 10 can take the form of a rake receiver or a chip level equaliser with suitable descrambling and despreading components. These generate DPCH signal samples yk in a known manner.
One of the functions of the receiver is to calculate reliability information on the received data bits, for example in the form of bit log likelihood ratios (LLRs). An LLR calculation block is denoted by reference numeral 12 in FIG. 1. The log likelihood ratios are supplied to a deinterlever and channel decoder 14 for decoding the received data bits associated with the signal samples yk. Channel decoders which take into account reliability information for example in the form of log likelihood ratios are often referred to as soft-input channel decoders. Examples are given by soft-input/hard-output convolutional decoders or soft-input/soft-output turbo decoders.
It can be seen that in situations where the SCH interference (which can be significant on the affected data samples) is not properly taken into account, not only the data bits corresponding to these signal samples will be subject to higher interference, but their reliability estimates will indicate a much higher level of reliability than is in fact the case.
The DPCH samples yk are modelled as the sum of a signal component and an interference-plus-noise componentyk=a√{square root over (Es)}sk+nk,  Equation 1where sk=sIk+jsQk, sIk=b1k, sQk=b2k ε{+1,−1} are the QPSK symbols transmitted on the DPCH, b1k, b2k denote the bits mapped onto each symbol, aεR+ wherein R+ is the set of positive real numbers, Es is the received symbol energy, and nk=nIk+jnQk represents the noise-plus-interference, modelled as an additive complex Gaussian process with zero mean and variance N0. The bit LLRs relative to the received signal rk can be derived independently for each of the two bits b1k, b2k mapped to the QPSK symbol sk. Considering the bit bik, i=1, 2 and letting yik=Re[yk] for i=1 and yik=Im[yk] for i=2, we have
                              L          ⁡                      (                                          b                ik                            |                              y                k                                      )                          =                              ln            ⁢                                                  ⁢                                          Pr                ⁡                                  (                                                            b                      ik                                        =                                                                  +                        1                                            |                                              y                        k                                                                              )                                                            Pr                ⁡                                  (                                                            b                      ik                                        =                                                                  -                        1                                            |                                              y                        k                                                                              )                                                              =                                                    4                ⁢                                  ay                  ik                                ⁢                                                      E                    s                                                                              N                0                                      .                                              Equation        ⁢                                  ⁢        2            
FIG. 2 is a schematic block diagram of the LLR calculation block 12. As shown in FIG. 2, the LLR for the DPCH bits is calculated using an estimate of the received signal energy Es and of the noise-plus-interference variance N0 (block 16). Specifically, apart from a suitable scaling factor η, the LLR is obtained as the product of the demodulated signal amplitude yik and an estimate of the quantity √{square root over (Es)}/N0 in the LLR scaling block 18
                              L          ⁢                      (                                          b                ik                            |                              y                k                                      )                          =                              y            ik                    ×          η          ⁢                                                                      E                  s                                                            N                0                                      .                                              Equation        ⁢                                  ⁢        3            
As illustrated in FIG. 2, the estimate of the quantities Es and N0 is obtained from the dedicated DPCH pilots corresponding to the samples yk at specified positions within the DPCH time slot (normally at the end). Since the DPCH time slot is transmitted with a specified delay τDPCH with respect to the SCH time slot, the DPCH dedicated pilot symbols may not be affected by the SCH. If this happens, and if the SCH represents a significant portion of the total received power, then the received DPCH symbols corresponding to the position of the SCH may have a very large amplitude due to SCH interference, and at the same time the estimate of the noise-plus-interference power N0 may be small, because it does not take into account the SCH interference. In this situation, the reliability of the received data will be overestimated, potentially by a significant amount. Large, erroneous LLRs will have a negative impact on the channel decoder's ability to correct errors.
An alternative possibility is to base the estimate of N0 on samples yk(CPICH) of CPICH symbols distributed throughout the slot. In this case, Es can be estimated using the DPCH pilot samples. If the estimate of N0 is based on the CPICH symbols, and is obtained from the entire CPICH time slot, again for the received DPCH symbols corresponding to the position of the SCH the noise-plus-interference power will be underestimated, and the reliability of the received data will be overestimated.
The fact that the presence of the SCH channel may limit the performance of the WCDMA downlink has been already discussed in an article by F. Kaltenberger, K. Freudenthaler, S. Paul, J. Wehinger, C. F. Mecklenbräuker and S. Springer, “Throughput enhancement by cancellation of synchronisation and pilot channel for UMTD High Speed Downlink Packet Access”, Proceedings of 6th IEEE International Workshop on Advances in Wireless Communications (SPAWC), New York, USA, June 2005, pp. 603-607. This article proposes to resolve the problem by cancelling the interference due to the SCH. This approach has the disadvantage of a high implementation cost due to the complexity of the required circuitry in the receiver.